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  • 专利说明
  • 权利要求
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    • 专利摘要:
    PURPOSE: A silicon on insulator(SOI) semiconductor device and a fabrication method thereof are provided to improve a characteristic of electrostatic discharge. CONSTITUTION: A silicon substrate(10) has a field oxide layer selectively formed therein and a patterned silicon layer(13) formed thereon. The patterned silicon layer(13) has holes through which the field oxide layer(11a) is partly exposed and in which another oxide layer is deposited. Therefore, an integral bottle-shaped field oxide layer(11a) is formed from the field oxide layer and the deposited oxide layer. Next, heavily doped p-type regions(15) are formed in the substrate(10) to dissipate an electrostatic discharge current. Then, a gate oxide layer(16) and a gate electrode(17) are selectively formed on the silicon layer(13). Subsequently, while a photoresist pattern(18) covers the exposed field oxide layer(11a) and the gate electrode(17), n-type source/drain regions(19) are formed in the exposed silicon layer(13) by ion implantation through the photoresist pattern(18).
    公开号:KR20000042851A
    申请号:KR1019980059143
    申请日:1998-12-28
    公开日:2000-07-15
    发明作者:오정희
    申请人:김영환；현대전자산업 주식회사；
    IPC主号:
    专利说明:

    Semiconductor element formed on SOH substrate and its manufacturing method
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device and a method for manufacturing the same.
    Generally, a silicon on insulator (SOI) wafer is provided as a substrate for forming a device of low power and high speed by preventing RC delay time due to parasitic capacitance of a semiconductor device and leakage current in a junction region.
    Such an SOI wafer is manufactured by a device wafer on which an insulating film is formed, a method of attaching a handling wafer, and a SIMO (seperation by implanted oxygen) method in which oxygen ions are deeply implanted and formed in a silicon wafer.
    As shown in FIG. 1, an SOI substrate 100 composed of a handling substrate 1, an insulating layer 2, and a silicon layer 3 on which a device is formed is provided. Here, the silicon layer 3 is a layer doped with impurities of the first conductivity type, and is formed to a thickness of about 300 to 1500 mW to prevent punch-through and short channel phenomenon of the MOS transistor formed on the SOI substrate. A field oxide film 4 for defining an active region in a predetermined portion of the silicon layer 3 is formed by a known LOCOS method. Here, the lower part of the field oxide film 4 is in contact with the insulating layer 2, so that the active region in which the element is formed is completely separated. The gate oxide film 5 and the polysilicon film are sequentially formed on the silicon layer 3, and the gate oxide film 5 and the polysilicon film are patterned to form a gate electrode 6. The source / drain regions 7 are formed by ion implantation of impurities of the second conductivity type in the silicon layer 3 between the gate electrode 6 and the field oxide film 4. Here, the source / drain region 6 is in contact with the insulating layer 2, so that the junction capacitance and the leakage current do not occur. Thereafter, the interlayer insulating film 8 is deposited to a predetermined thickness over the entire structure, and is etched to expose the source / drain regions 7, and then metal wiring 9 is formed in contact with the source / drain regions.
    However, the semiconductor device on the SOI substrate is promising as a low voltage device due to the small junction capacitance, but the electrostatic discharge (ESD) characteristics are very weak.
    Accordingly, in order to protect the internal circuits when static electricity flows from the outside in the conventional SOI substrate, an ESD protection circuit made of an NMOS transistor or a CMOS transistor is disposed so that the ESD current is discharged through the grounded well or the source electrode. It was made.
    However, in the MOS transistor formed on the SOI substrate, since the bottom surface of the source and drain regions are both in contact with the buried oxide film, the introduced ESD current is difficult to escape to the edge of the junction. As a result, current is concentrated and heat is generated more than bulk devices. In addition, heat is generated as the injected charges are discharged to the ground, which is difficult to discharge easily in such an SOI structure.
    Accordingly, an object of the present invention is to solve the above-described problems, and to provide a semiconductor device formed on an SOI substrate capable of improving electrostatic discharge characteristics.
    Another object of the present invention is to provide a method of manufacturing the semiconductor device.
    1 is a cross-sectional view of a semiconductor device formed on a conventional SOH substrate.
    2A to 2I are cross-sectional views of respective processes for explaining a method of manufacturing a semiconductor device formed on an SOI substrate according to the present invention.
    (Explanation of symbols for the main parts of the drawing)
    10-silicon substrate 11a-field oxide film
    12-Oxide 13-Silicon Layer
    14,14a, 18-photoresist pattern 15-impurity region
    16-gate oxide 17-gate electrode
    19-source, drain area
    In order to achieve the above object of the present invention, according to one aspect of the present invention, the present invention is disposed on a silicon substrate, a silicon layer laminated on the silicon substrate, and the silicon substrate and a predetermined portion in the silicon layer A field oxide film defining an active region in which a semiconductor device is to be formed, a gate electrode formed over a predetermined portion of a silicon layer corresponding to the active region, and a silicon layer between both sides of the gate electrode and the field oxide film, respectively. It is characterized in that it comprises a source, a drain region, and an impurity region formed at an interface between the silicon substrate and the silicon layer between the field oxide film and having a type opposite to that of the source and drain regions.
    Here, the cross section of the field oxide film has a "凸" shape.
    In addition, according to another aspect of the invention, forming a trench-type first field oxide film protruding a predetermined height in the silicon substrate in the silicon substrate, forming a silicon layer on the silicon substrate and the trench-type field oxide film; And forming a second field oxide film in the silicon layer above the first field oxide film to have a width narrower than the width of the first field oxide film to form a U-shaped field oxide film, and silicon layers on both sides of the field oxide film. And forming an impurity region in the silicon substrate in contact with the semiconductor substrate, and forming a MOS transistor of a type opposite to the impurity region in the silicon layer between the field oxide layer.
    The forming of the first field oxide layer may include forming a trench by etching a predetermined portion of the silicon substrate by a predetermined depth; Buried oxide in the trench; Forming an oxide film on the trench oxide and the silicon substrate by a predetermined thickness; And etching the oxide layer so as to remain only on the trench oxide.
    The silicon layer is formed by crystal growth of the silicon substrate.
    The forming of the U-shaped field oxide layer may include forming a photoresist pattern on the silicon layer to expose a predetermined portion of the first field oxide layer; Etching a predetermined portion of the silicon layer and the first field oxide layer using the photoresist pattern as a mask to form a hole; Forming an oxide film on the resultant portion so that the hole is sufficiently buried; Removing the oxide film on the silicon layer so as to embed the oxide film in the hole.
    In the step of forming the impurity region, when implanting the impurity ions constituting the impurity region, ion implantation is performed while adding germanium ions or ion implantation while adding argon or nitrogen atoms.
    The forming of the MOS transistor may include forming a gate electrode on an upper portion of a silicon layer between the field oxide layers; And forming a source and a drain region by ion implanting impurities of a type opposite to that of the impurity region into the silicon layer between the sidewall of the gate electrode and the field oxide layer.
    According to the present invention, in an SOI substrate formed of a laminated structure of a silicon substrate and a crystalline silicon film, the field oxide film is formed in a U-shape so as to surround the active region, and an impurity region is formed in the silicon substrate which is floated between the field oxide films. .
    Accordingly, the ESD current generated in the semiconductor device is dispersed through the impurity region of the silicon substrate. Thus, the ESD current is easily released, eliminating the heat generation phenomenon due to the current concentration.
    (Example)
    Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
    2A to 2I are cross-sectional views of respective processes for explaining a method of manufacturing a semiconductor device formed on an SOI substrate according to the present invention.
    Referring to FIG. 2A, a trench (not shown) is formed by etching a predetermined depth of the silicon substrate 10, for example, about 100 microseconds, and then filling an oxide film in the trench to form the first field oxide film 11. Form.
    Next, as shown in FIG. 2B, the oxide film 12 is formed on the first field oxide film 11 and the silicon substrate 10 at about 5 to 15 kV.
    Thereafter, as shown in FIG. 2C, a first photoresist pattern (not shown) is formed by a known photolithography process so as to cover the field oxide film 11 portion on the oxide film 12, and then the first photo. The exposed portion of the oxide film 12 is etched using the resist pattern as a mask. Accordingly, the height of the first field oxide film 11 protrudes from the surface of the silicon substrate 10 by a predetermined thickness, and the active region where the semiconductor element is to be formed is defined. Then, the surface of the resultant crystal is grown, and the silicon substrate 10 is crystal grown on the silicon substrate 10 and the field oxide film 11 to form a crystal growth silicon layer 13.
    Then, as shown in FIG. 2D, the second photoresist pattern 14 is formed on the crystal growth silicon layer 13 to expose a predetermined portion of the first field oxide film 11. At this time, the width exposed by the second photoresist pattern 14 is smaller than the width of the first field oxide film 11. Thereafter, the crystal growth silicon layer 13 is patterned using the second photoresist pattern 14 as a mask to form a hole h for opening a predetermined portion of the field oxide film 11.
    Next, as shown in FIG. 2E, the second photoresist pattern 15 is removed.
    Next, as shown in FIG. 2F, an oxide film is deposited to sufficiently fill the hole h on the resultant, and then an etch back or chemical mechanical polishing process is performed to expose the surface of the crystal growth silicon layer 13. Thus, an oxide film is embedded in the hole h to form the second field oxide film 11 '. Therefore, the convex field oxide film 11a is formed.
    Then, as shown in FIG. 2G, the third photoresist pattern 14 is formed by a known photolithography process so as to cover the portion of the field oxide film 11a on the resultant. That is, the width of the third photoresist pattern is equal to or slightly larger than the width of the field oxide film having the relatively wide width. Then, for example, a high concentration P-type impurity is ion-implanted into the silicon substrate 10 on both sides of the field oxide film 11a to form the impurity region 11a. At this time, during the process of ion implanting the P-type impurities, germanium ions may be added at the same time, or argon, nitrogen, etc., which are inactive atoms, may be added at the same time to form a shallow thickness of the impurity region 15. Here, the impurity region 15 may be formed in the silicon substrate 10 in contact with the silicon layer 11 to prevent the silicon layer 11 and the silicon substrate 10 from floating, and the ESD current may be prevented through this portion. To be discharged.
    Thereafter, as shown in FIG. 2H, the gate oxide film 16 and the gate electrode 17 are formed by a known method in a predetermined portion of the crystalline silicon layer 13 between the field oxide films 11a.
    Subsequently, as shown in FIG. 2I, a fourth photoresist pattern 18 is formed on the gate electrode 17 to cover the exposed field oxide film 11a. Next, for example, an N-type impurity is ion-implanted into the exposed crystalline silicon layer to form a source and drain region 19. As a result, a MOS transistor is formed on the SOI substrate.
    In the present invention, the field oxide film 11a is formed in a "凸" shape to completely separate the active regions, and to prevent the substrate floating phenomenon on the silicon substrate 10 under the active regions between the field oxide films 11a. An impurity region 15 serving as a contact is formed. Accordingly, even if the source and drain regions are in contact with the field oxide film, the ESD current generated in the semiconductor element is easily discharged through the impurity region 15.
    In addition, this invention is not limited only to the above-mentioned embodiment. For example, in the present embodiment, the impurity region is P-type and the source and drain are N-type, but the same effect can be obtained even if it is changed to this.
    As described in detail above, according to the present invention, in an SOI substrate formed of a laminated structure of a silicon substrate and a crystalline silicon film, the field oxide film is formed in a U-shape so as to surround the active region, and is floated between the field oxide films. An impurity region is formed in the silicon substrate.
    Accordingly, the ESD current generated in the semiconductor device is dispersed through the impurity region of the silicon substrate. Thus, the ESD current is easily released, eliminating the heat generation phenomenon due to the current concentration.
    In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.
    权利要求:
    Claims (9)
    [1" claim-type="Currently amended] Silicon substrates;
    A silicon layer laminated on the silicon substrate;
    A field oxide film disposed on the silicon substrate and a predetermined portion of the silicon layer and defining an active region in which a semiconductor device is to be formed;
    A gate electrode formed on a predetermined portion of the silicon layer corresponding to the active region;
    Source and drain regions respectively formed in the silicon layer between both sides of the gate electrode and the field oxide layer; And
    And a semiconductor device formed at an interface between the silicon substrate and the silicon layer between the field oxide film and an impurity region having a type opposite to that of the source and drain regions.
    [2" claim-type="Currently amended] The semiconductor device according to claim 1, wherein a cross section of said field oxide film has a "凸" shape.
    [3" claim-type="Currently amended] Forming a trench-type first field oxide film protruding a predetermined height into the substrate surface in the silicon substrate;
    Forming a silicon layer on the silicon substrate and the trench type field oxide layer;
    Forming a second field oxide film in the silicon layer on the first field oxide film to have a width narrower than the width of the first field oxide film to form a U-shaped field oxide film;
    Forming an impurity region in the silicon substrate in contact with the silicon layers on both sides of the field oxide film; And
    And forming a MOS transistor of a type opposite to that of the impurity region in the silicon layer between the field oxide films.
    [4" claim-type="Currently amended] The method of claim 3, wherein the forming of the first field oxide layer comprises: forming a trench by etching a predetermined portion of the silicon substrate by a predetermined depth; Buried oxide in the trench; Forming an oxide film on the trench oxide and the silicon substrate by a predetermined thickness; And etching the oxide layer so that only the trench oxide remains on the trench oxide.
    [5" claim-type="Currently amended] 4. The method of claim 3, wherein the silicon layer is formed by crystal growth of the silicon substrate.
    [6" claim-type="Currently amended] The method of claim 3, wherein the forming of the U-shaped field oxide film comprises: forming a photoresist pattern on the silicon layer to expose a predetermined portion of the first field oxide film; Etching a predetermined portion of the silicon layer and the first field oxide layer using the photoresist pattern as a mask to form a hole; Forming an oxide film on the resultant portion so that the hole is sufficiently buried; And removing the oxide film on the silicon layer so that the oxide film is embedded in the hole.
    [7" claim-type="Currently amended] 4. The method of claim 3, wherein in the forming of the impurity region, ion implantation is performed while adding germanium ions when ion implantation of the impurity ions forming the impurity region.
    [8" claim-type="Currently amended] The semiconductor device as set forth in claim 3, wherein in the forming of the impurity region, when implanting the impurity ions forming the impurity region, ion implantation is performed while adding an argon or a nitrogen atom. Way.
    [9" claim-type="Currently amended] The method of claim 3, wherein the forming of the MOS transistor comprises: forming a gate electrode on a predetermined portion of the silicon layer between the field oxide layers; And forming a source and a drain region by ion implanting impurities of a type opposite to that of the impurity region into the silicon layer between the sidewall of the gate electrode and the field oxide layer. Manufacturing method.
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    同族专利:
    公开号 | 公开日
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1998-12-28|Application filed by 김영환, 현대전자산업 주식회사
    1998-12-28|Priority to KR1019980059143A
    1998-12-28|Priority claimed from KR1019980059143A
    2000-07-15|Publication of KR20000042851A
    2001-12-17|Application granted
    2001-12-17|Publication of KR100305641B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019980059143A|KR100305641B1|1998-12-28|Semiconductor element formed on SOH substrate and its manufacturing method|
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